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模拟CMOS集成电路设计(影印版)
作者:(美)罗扎
出版社:清华大学出版社
出版时间:2005-08-01
ISBN:9787302108863
定价:¥68.00
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内容简介
模拟集成电路的设计与其说是一门技术,还不如说是一门艺术。它比数字集成电路设计需要更严格的分析和更丰富的直觉。严谨坚实的理论无疑是严格分析能力的基石,而设计者的实践经验无疑是诞生丰富直觉的源泉。这也正足初学者对学习模拟集成电路设计感到困惑并难以驾驭的根本原因。.美国加州大学洛杉机分校(UCLA)Razavi教授凭借着他在美国多所著名大学执教多年的丰富教学经验和在世界知名顶级公司(AT&T,BellLab,HP)卓著的研究经历为我们提供了这本优秀的教材。本书自2000午出版以来得到了国内外读者的好评和青睐,被许多国际知名大学选为教科书。同时,由于原著者在世界知名顶级公司的丰富研究经历,使本书也非常适合作为CMOS模拟集成电路设计或相关领域的研究人员和工程技术人员的参考书。...
作者简介
Behzad Razavi received the B.B.Sc.degree in electrical engineering from Sharif University of Technology in 1985 and the M.Sc. and Ph.D.degrees in electrical engineering from Stanford University in 1998 and 1992,respectively.He was with AT&T Bell Laboratories and subsequently Hewlett-Packard Laboratories until 1996.TOP目录 About the AuthorPrefaceAcknowledgments1 Introduction to Analog Design 1.1 Why Analog? 1.2 Why Inegrated? 1.3 Why CMOS? 1.4 Why This Book? 1.5 General Concepts2 Basic MOS Device Physics 2.1 General Considerations 2.2 MOS I/V Characteristics 2.3 Second-Order Effects 2.4 MOS Device Model3 Single-Stage Amplifiers 3.1 Basic Concepts 3.2 Common-Source Stage 3.3 Source Follower 3.4 Common-Gate Stage 3.5 Cascode Stage 3.6 Choice of Device Models4 Differential Amplifiers ……5 Passive and Active Current Mirrors6 Frequency Response of Amplifiers7 Noise8 Feedback9 Operational Amplifiers10 Stability and Frequency Compensation11 Bandgap References12 Introduction to Switched-Capacitor Circuits13 Nonlinearity and Mismatch14 Oscillators15 Phase-Locked LoopsAppendix A Short-Channel Effects and Device ModelsAppendix B CMOS Processing TechnologyAppendix C Layout and PackagingIndex TOP 其它信息 装帧:平装页数:684 版次:2005-08-01开本:16开
目录
AbouttheAuthor
Preface
Acknowledgments
IntroductiontoAnalogDesign
1.1WhyAnalog?.
1.2WhyIntegrated?
1.3WhyCMOS?
1.4WhyThisBook?
1.5GeneralConcepts
1.5.1LevelsofAbstraction
1.5.2RobustAnalogDesign
2BasicMOSDevicePhysics
2.1GeneralConsiderations
2.1.1MOSFETasaSwitch
2.1.2MOSFETStructure
2.1.3MOSSymbols
2.2MOSI/VCharacteristics
2.2.1ThresholdVoltage
2.2.2DerivationofI/VCharacteristics
2.3Second-OrderEffects
2.4MOSDeviceModels
2.4.1MOSDeviceLayout
2.4.2MOSDeviceCapacitances
2.4.3MOSSmall-SignalModel
2.4.4MOSSPICEmodels
2.4.5NMOSversusPMOSDevices
2.4.6Long-ChannelversusShort-ChannelDevices
3Single-StageAmplifiers
3.1BasicConcepts
3.2Common-SourceStage
3.2.1Common-SourceStagewithResistiveLoad
3.2.2CSStagewithDiode-ConnectedLoad
3.2.3CSStagewithCurrent-SourceLoad
3.2.4CSStagewithTriodeLoad
3.2.5CSStagewithSourceDegeneration
3.3SourceFollower
3.4Common-GateStage
3.5CascodeStage
3.5.1FoldedCascode
3.6ChoiceofDeviceModels
4DifferentialAmplifiers
4.1Single-EndedandDifferentialOperation
4.2BasicDifferentialPair
4.2.1QualitativeAnalysis
4.2.2QuantitativeAnalysis
4.3Common-ModeResponse
4.4DifferentialPairwithMOSLoads
4.5GilbertCell
5PassiveandActiveCurrentMirrors
5.1BasicCurrentMirrors
5.2CascodeCurrentMirrors
5.3ActiveCurrentMirrors
5.3.1Large-SignalAnalysis
5.3.2Small-SignalAnalysis
5.3.3Common-ModeProperties
6FrequencyResponseofAmplifiers
6.1GeneralConsiderations
6.1.1MillerEffect
6.1.2AssociationofPoleswithNodes
6.2Common-SourceStage
6.3SourceFollowers
6.4Common-GateStage
6.5CascodeStage
6.6DifferentialPair
AppendixA:DualofMiller'sTheorem
7Noise
7.1StatisticalCharacteristicsofNoise
7.1.1NoiseSpectrum
7.1.2AmplitudeDistribution
7.1.3CorrelatedandUncorrelatedSources
7.2TypesofNoise
7.2.1ThermalNoise
7.2.2FlickerNoise
7.3RepresentationofNoiseinCircuits
7.4NoiseinSingle-StageAmplifiers
7.4.1Common-SourceStage
7.4.2Common-GateStage
7.4.3SourceFollowers
7.4.4CascodeStage
7.5NoiseinDifferentialPairs
7.6NoiseBandwidth
8Feedback
8.1GeneralConsiderations
8.1.1PropertiesofFeedbackCircuits
8.1.2TypesofAmplifiers
8.2FeedbackTopologies
8.2.1Voltage-VoltageFeedback
8.2.2Current-VoltageFeedback
8.2.3Voltage-CurrentFeedback
8.2.4Current-CurrentFeedback
8.3EffectofLoading
8.3.1Two-PortNetworkModels
8.3.2LoadinginVoltage-VoltageFeedback
8.3.3LoadinginCurrent-VoltageFeedback
8.3.4LoadinginVoltage-CurrentFeedback
8.3.5LoadinginCurrent-CurrentFeedback
8.3.6SummaryofLoadingEffects
8.4EffectofFeedbackonNoise
9OperationalAmplifiers
9.1GeneralConsiderations
9.1.1PerformanceParameters
9.2One-StageOpAmps
9.3Two-StageOpAmps
9.4GainBoosting
9.5Comparison..
9.6Common-ModeFeedback
9.7InputRangeLimitations
9.8SlewRate
9.9PowerSupplyRejection
9.10NoiseinOpAmps
10StabilityandFrequencyCompensation
10.1GeneralConsiderations
10.2MultipoleSystems
10.3PhaseMargin
10.4FrequencyCompensation
10.5CompensationofTwo-StageOpAmps
10.5.1SlewinginTwo-StageOpAmps
10.6OtherCompensationTechniques
11BandgapReferences
11.1GeneralConsiderations
11.2Supply-IndependentBiasing
11.3Temperature-IndependentReferences
11.3.1Negative-TCVoltage
11.3.2Positive-TCVoltage
11.3.3BandgapReference
11.4PTATCurrentGeneration
11.5Constant-GmBiasing
11.6SpeedandNoiseIssues
11.7CaseStudy
12IntroductiontoSwitched-CapacitorCircuits
12.1GeneralConsiderations
12.2SamplingSwitches
12.2.1MOSFETSasSwitches
12.2.2SpeedConsiderations
12.2.3PrecisionConsiderations
12.2.4ChargeInjectionCancellation
12.3Switched-CapacitorAmplifiers
12.3.1Unity-GainSampler/Buffer
12.3.2NoninvertingAmplifier
12.3.3PrecisionMultiply-by-TwoCircuit
12.4Switched-CapacitorIntegrator
12.5Switched-CapacitorCommon-ModeFeedback
13NonlinearityandMismatch
13.1Nonlinearity
13.1.1GeneralConsiderations
13.1.2NonlinearityofDifferentialCircuits
13.1.3EffectofNegativeFeedbackonNonlinearity
13.1.4CapacitorNonlinearity
13.1.5LinearizationTechniques
13.2Mismatch
13.2.1OffsetCancellationTechniques
13.2.2ReductionofNoisebyOffsetCancellation
13.2.3AlternativeDefinitionofCMRR
14Oscillators
14.1GeneralConsiderations
14.2RingOscillators
14.3LCOscillators
i4.3.1Crossed-CoupledOscillator
14.3.2ColpittsOscillator
14.3.3One-PortOscillators
14.4Voltage-ControlledOscillators
14.4.1TuninginRingOscillators
14.4.2TuninginLCOscillators
14.5MathematicalModelofVCOs
15Phase-LockedLoops
15.1SimplePLL
15.1.1PhaseDetector
15.1.2BasicPLLTopology
15.1.3DynamicsofSimplePLL
15.2Charge-PumpPLLs
15.2.1ProblemofLockAcquisition
15.2.2Phase/FrequencyDetectorandChargePump
15.2.3BasicCharge-PumpPLL
15.3NonidealEffectsinPLLs
15.3.1PFD/CPNonidealities
15.3.2JitterinPLLs
15.4Delay-LockedLoops
15.5Applications
15.5.1FrequencyMultiplicationandSynthesis
15.5.2SkewReduction
15.5.3JitterReduction
AppendixAShort-ChannelEffectsandDeviceModels
A.1ScalingTheory
A.2Short-ChannelEffects
A.2.1ThresholdVoltageVariation
A.2.2MobilityDegradationwithVerticalField
A.2.3VelocitySaturation
A.2.4HotCarrierEffects
A.2.5OutputImpedanceVariationwithDrain-SourceVoltage
A.3MOSDeviceModels
A.3.1Level1Model
A.3.2Level2Model
A.3.3Level3Model
A.3.4BSIMSeries
A.3.5OtherModels
A.3.6ChargeandCapacitanceModeling
A.3.7TemperatureDependence
A.4ProcessComers
A.5AnalogDesigninaDigitalWorld
AppendixBCMOSProcessingTechnology
B.1GeneralConsiderations
B.2WaferProcessing
B.3Photolithography
B.4Oxidation
B.5IonImplantation
B.6DepositionandEtching
B.7DeviceFabrication
B.7.1ActiveDevices
B.7.2PassiveDevices
B.7.3Interconnects
B.8Latch-Up
AppendixCLayoutandPackaging
C.1GeneralLayoutConsiderations
C.1.1DesignRules
C.1.2AntennaEffect
C.2AnalogLayoutTechniques
C.2.1MultifingerTransistors
C.2.2Symmetry
C.2.3ReferenceDistribution
C.2.4PassiveDevices
C.2.5Interconnects
C.3SubstrateCoupling...
Index
Preface
Acknowledgments
IntroductiontoAnalogDesign
1.1WhyAnalog?.
1.2WhyIntegrated?
1.3WhyCMOS?
1.4WhyThisBook?
1.5GeneralConcepts
1.5.1LevelsofAbstraction
1.5.2RobustAnalogDesign
2BasicMOSDevicePhysics
2.1GeneralConsiderations
2.1.1MOSFETasaSwitch
2.1.2MOSFETStructure
2.1.3MOSSymbols
2.2MOSI/VCharacteristics
2.2.1ThresholdVoltage
2.2.2DerivationofI/VCharacteristics
2.3Second-OrderEffects
2.4MOSDeviceModels
2.4.1MOSDeviceLayout
2.4.2MOSDeviceCapacitances
2.4.3MOSSmall-SignalModel
2.4.4MOSSPICEmodels
2.4.5NMOSversusPMOSDevices
2.4.6Long-ChannelversusShort-ChannelDevices
3Single-StageAmplifiers
3.1BasicConcepts
3.2Common-SourceStage
3.2.1Common-SourceStagewithResistiveLoad
3.2.2CSStagewithDiode-ConnectedLoad
3.2.3CSStagewithCurrent-SourceLoad
3.2.4CSStagewithTriodeLoad
3.2.5CSStagewithSourceDegeneration
3.3SourceFollower
3.4Common-GateStage
3.5CascodeStage
3.5.1FoldedCascode
3.6ChoiceofDeviceModels
4DifferentialAmplifiers
4.1Single-EndedandDifferentialOperation
4.2BasicDifferentialPair
4.2.1QualitativeAnalysis
4.2.2QuantitativeAnalysis
4.3Common-ModeResponse
4.4DifferentialPairwithMOSLoads
4.5GilbertCell
5PassiveandActiveCurrentMirrors
5.1BasicCurrentMirrors
5.2CascodeCurrentMirrors
5.3ActiveCurrentMirrors
5.3.1Large-SignalAnalysis
5.3.2Small-SignalAnalysis
5.3.3Common-ModeProperties
6FrequencyResponseofAmplifiers
6.1GeneralConsiderations
6.1.1MillerEffect
6.1.2AssociationofPoleswithNodes
6.2Common-SourceStage
6.3SourceFollowers
6.4Common-GateStage
6.5CascodeStage
6.6DifferentialPair
AppendixA:DualofMiller'sTheorem
7Noise
7.1StatisticalCharacteristicsofNoise
7.1.1NoiseSpectrum
7.1.2AmplitudeDistribution
7.1.3CorrelatedandUncorrelatedSources
7.2TypesofNoise
7.2.1ThermalNoise
7.2.2FlickerNoise
7.3RepresentationofNoiseinCircuits
7.4NoiseinSingle-StageAmplifiers
7.4.1Common-SourceStage
7.4.2Common-GateStage
7.4.3SourceFollowers
7.4.4CascodeStage
7.5NoiseinDifferentialPairs
7.6NoiseBandwidth
8Feedback
8.1GeneralConsiderations
8.1.1PropertiesofFeedbackCircuits
8.1.2TypesofAmplifiers
8.2FeedbackTopologies
8.2.1Voltage-VoltageFeedback
8.2.2Current-VoltageFeedback
8.2.3Voltage-CurrentFeedback
8.2.4Current-CurrentFeedback
8.3EffectofLoading
8.3.1Two-PortNetworkModels
8.3.2LoadinginVoltage-VoltageFeedback
8.3.3LoadinginCurrent-VoltageFeedback
8.3.4LoadinginVoltage-CurrentFeedback
8.3.5LoadinginCurrent-CurrentFeedback
8.3.6SummaryofLoadingEffects
8.4EffectofFeedbackonNoise
9OperationalAmplifiers
9.1GeneralConsiderations
9.1.1PerformanceParameters
9.2One-StageOpAmps
9.3Two-StageOpAmps
9.4GainBoosting
9.5Comparison..
9.6Common-ModeFeedback
9.7InputRangeLimitations
9.8SlewRate
9.9PowerSupplyRejection
9.10NoiseinOpAmps
10StabilityandFrequencyCompensation
10.1GeneralConsiderations
10.2MultipoleSystems
10.3PhaseMargin
10.4FrequencyCompensation
10.5CompensationofTwo-StageOpAmps
10.5.1SlewinginTwo-StageOpAmps
10.6OtherCompensationTechniques
11BandgapReferences
11.1GeneralConsiderations
11.2Supply-IndependentBiasing
11.3Temperature-IndependentReferences
11.3.1Negative-TCVoltage
11.3.2Positive-TCVoltage
11.3.3BandgapReference
11.4PTATCurrentGeneration
11.5Constant-GmBiasing
11.6SpeedandNoiseIssues
11.7CaseStudy
12IntroductiontoSwitched-CapacitorCircuits
12.1GeneralConsiderations
12.2SamplingSwitches
12.2.1MOSFETSasSwitches
12.2.2SpeedConsiderations
12.2.3PrecisionConsiderations
12.2.4ChargeInjectionCancellation
12.3Switched-CapacitorAmplifiers
12.3.1Unity-GainSampler/Buffer
12.3.2NoninvertingAmplifier
12.3.3PrecisionMultiply-by-TwoCircuit
12.4Switched-CapacitorIntegrator
12.5Switched-CapacitorCommon-ModeFeedback
13NonlinearityandMismatch
13.1Nonlinearity
13.1.1GeneralConsiderations
13.1.2NonlinearityofDifferentialCircuits
13.1.3EffectofNegativeFeedbackonNonlinearity
13.1.4CapacitorNonlinearity
13.1.5LinearizationTechniques
13.2Mismatch
13.2.1OffsetCancellationTechniques
13.2.2ReductionofNoisebyOffsetCancellation
13.2.3AlternativeDefinitionofCMRR
14Oscillators
14.1GeneralConsiderations
14.2RingOscillators
14.3LCOscillators
i4.3.1Crossed-CoupledOscillator
14.3.2ColpittsOscillator
14.3.3One-PortOscillators
14.4Voltage-ControlledOscillators
14.4.1TuninginRingOscillators
14.4.2TuninginLCOscillators
14.5MathematicalModelofVCOs
15Phase-LockedLoops
15.1SimplePLL
15.1.1PhaseDetector
15.1.2BasicPLLTopology
15.1.3DynamicsofSimplePLL
15.2Charge-PumpPLLs
15.2.1ProblemofLockAcquisition
15.2.2Phase/FrequencyDetectorandChargePump
15.2.3BasicCharge-PumpPLL
15.3NonidealEffectsinPLLs
15.3.1PFD/CPNonidealities
15.3.2JitterinPLLs
15.4Delay-LockedLoops
15.5Applications
15.5.1FrequencyMultiplicationandSynthesis
15.5.2SkewReduction
15.5.3JitterReduction
AppendixAShort-ChannelEffectsandDeviceModels
A.1ScalingTheory
A.2Short-ChannelEffects
A.2.1ThresholdVoltageVariation
A.2.2MobilityDegradationwithVerticalField
A.2.3VelocitySaturation
A.2.4HotCarrierEffects
A.2.5OutputImpedanceVariationwithDrain-SourceVoltage
A.3MOSDeviceModels
A.3.1Level1Model
A.3.2Level2Model
A.3.3Level3Model
A.3.4BSIMSeries
A.3.5OtherModels
A.3.6ChargeandCapacitanceModeling
A.3.7TemperatureDependence
A.4ProcessComers
A.5AnalogDesigninaDigitalWorld
AppendixBCMOSProcessingTechnology
B.1GeneralConsiderations
B.2WaferProcessing
B.3Photolithography
B.4Oxidation
B.5IonImplantation
B.6DepositionandEtching
B.7DeviceFabrication
B.7.1ActiveDevices
B.7.2PassiveDevices
B.7.3Interconnects
B.8Latch-Up
AppendixCLayoutandPackaging
C.1GeneralLayoutConsiderations
C.1.1DesignRules
C.1.2AntennaEffect
C.2AnalogLayoutTechniques
C.2.1MultifingerTransistors
C.2.2Symmetry
C.2.3ReferenceDistribution
C.2.4PassiveDevices
C.2.5Interconnects
C.3SubstrateCoupling...
Index
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