书籍详情
可重配置计算 体系结构与应用：ARC 2006 第2届国际研讨会（论文集LNCS-3985）
作者：Koen Bertels 著
出版社：崇文书局（原湖北辞书出版社）
出版时间：2006-12-01
ISBN：9783540367086
定价：¥678.00
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内容简介
This book constitutes the thoroughly refereed post-proceedings of the Second International Workshop on Reconfigurable Computing， ARC 2006， held in Delft， The Netherlands， in March 2006.The 22 revised full papers and 35 revised short papers presented were thoroughly reviewed and selected from 95 submissions. The papers are organized in topical sections on applications， power， image processing， organization and architecture， networks and communication， security， and tools.
作者简介
暂缺《可重配置计算 体系结构与应用：ARC 2006 第2届国际研讨会（论文集LNCS-3985）》作者简介
目录
Applications
Implementation of Realtime and Highspeed Phase Detector on FPGA
Case Study: Implementation of a Virtual Instrument on a Dynamically Reconfigurable Platform
Configurable Embedded Core for Controlling Electro-Mechanical Systems
Evaluation of a Locomotion Algorithm for Worm-Like Robots on FPGA-Embedded Processors
Dynamic Partial Reconfigurable FIR Filter Design
Event-Driven Simulation Engine for Spiking Neural Networks on a Chip
Towards an Optimal Implementation of MLP in FPGA
Power
Energy Consumption for Transport of Control Information on a Segmented Software-Controlled Communication Architecture
Quality Driven Dynamic Low Power Reconfiguration of Handhelds
An Efficient Estimation Method of Dynamic Power Dissipation on VLSI interconnects
Image Processing
Highly Paralellized Architecture for Image Motion Estimation
Design Exploration of a Video Pre-processor for an FPGA Based SoC
QUKU: A Fast Run Time Reconfigurable Platform for Image Edge Detection
Applications of Small-Scale Reconfigurability to Graphics Processors
An Embedded Multi-camera System for Simultaneous Localization and Mapping
Performance/Cost Trade-Off Evaluation for the DCT Implementation on the Dynanmcally Reconfigurable Processor
Trigonometric Computing Embedded in a Dynamically Reconfigurable CORDIC System-on-Chip
Handel-C Design Enhancement for FPGA-Based DV Decoder
Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the APACHES’Platform
A New VLSI Architecture of Lifting-Based DWT
……
Organization and Architecture
Networks and Communication
Security
Tools
Author Index
Implementation of Realtime and Highspeed Phase Detector on FPGA
Case Study: Implementation of a Virtual Instrument on a Dynamically Reconfigurable Platform
Configurable Embedded Core for Controlling Electro-Mechanical Systems
Evaluation of a Locomotion Algorithm for Worm-Like Robots on FPGA-Embedded Processors
Dynamic Partial Reconfigurable FIR Filter Design
Event-Driven Simulation Engine for Spiking Neural Networks on a Chip
Towards an Optimal Implementation of MLP in FPGA
Power
Energy Consumption for Transport of Control Information on a Segmented Software-Controlled Communication Architecture
Quality Driven Dynamic Low Power Reconfiguration of Handhelds
An Efficient Estimation Method of Dynamic Power Dissipation on VLSI interconnects
Image Processing
Highly Paralellized Architecture for Image Motion Estimation
Design Exploration of a Video Pre-processor for an FPGA Based SoC
QUKU: A Fast Run Time Reconfigurable Platform for Image Edge Detection
Applications of Small-Scale Reconfigurability to Graphics Processors
An Embedded Multi-camera System for Simultaneous Localization and Mapping
Performance/Cost Trade-Off Evaluation for the DCT Implementation on the Dynanmcally Reconfigurable Processor
Trigonometric Computing Embedded in a Dynamically Reconfigurable CORDIC System-on-Chip
Handel-C Design Enhancement for FPGA-Based DV Decoder
Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the APACHES’Platform
A New VLSI Architecture of Lifting-Based DWT
……
Organization and Architecture
Networks and Communication
Security
Tools
Author Index
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